Guralp-systems CMG-3ESPCD Manuel d'utilisateur Page 85

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CMG-3ESPCD Digital Broadband Seismometer Inside the 3ESPCD
7.2 Inside the DM24
7.2.1 Architecture
Internally, DM24 digitisers are structured as shown in the following diagram.
The system is designed around a low power, high performance ARM
microprocessor. This is a 32-bit processor with a large address space for data
storage and manipulation. It also includes many integrated functions such as
multiple timers and serial I/O ports. In addition, the system contains a Cirrus
Logic CS5376 digital filtering chip-set and TMS320VC33 digital signal
processor (DSP). The CS5376 provides data to the DSP at 2,000 samples per
MAN-C3E-0002 85 Issue B - November 2013
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